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参数资料
| 型号： | IPR-SLITE2 |
| 厂商： | Altera |
| 文件页数： | 96/110页 |
| 文件大小： | 0K |
| 描述： | IP SERIALLITE II RENEW |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | SerialLite II 协议 |
| 许可证： | 续用许可证 |
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5–10
Chapter 5: Testbench
Testbench Components Description
The first byte of each generated packet is a sequential identifier ( id ) that seeds the
LFSR. Every time the send_packet task is called, the agen id is incremented by one.
The module operates in one of two modes: data port or priority port. When in priority
port mode, the Atlantic dav signal is ignored for all but the first transfer of a packet.
There can be multiple agen instantiations (for data and priority port, DUT and
SISTER), depending on the DUT’s chosen parameters.
AGEN Tasks
This sections defines the AGEN tasks.
– send_packet(addr,size[31:0],err)
send_packet is the main AGEN task. It causes a packet of a specified size and
destined for a particular address to be transmitted. The err bit may also be assigned a
value. The data is based on a LFSR.
Table 5–1. send_packet Task Field Description
Field Location
in Task
1
2
Field
addr
size
Valid Values
0 to 0xFF (data)
0 to 0xF (priority)
0 to 0xFFFF_FFFF (bytes)
Description
Set to 0.
The size field sets the size, in bytes, of the current packet
being sent by this task.
The err field determines whether an Atlantic error is
3
err
1'b0 or 1'b1
asserted at the end of a packet when eop is asserted. You
can optionally set it to 1'b1 to set the error flag for that
packet.
– ipg(min[31:0],max[31:0])
If the gap task is called, successive packets are separated by a a random number of
idle cycles.
Table 5–2. gap Task Field Description
Field Location
in Task
1
min
Field
Valid Values
0 to 0xFFFF_FFFF
(cycles)
Description
The min field sets the minimum value, in Atlantic clock
cycles, for a random gap between two packets.
The max field sets the maximum value, in Atlantic clock
2
max
0 to 0xFFFF_FFFF
(cycles)
cycles, for a random gap between two packets.
A max field greater than or equal to the min field is required.
When max==min , no gap occurs.
– gap(prob[31:0],min[31:0],max[31:0])
SerialLite II MegaCore Function
User Guide
January 2014 Altera Corporation
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IPR-SRAM/QDRII | 功能描述:开发软件 QDRII SRAM Control MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-SSIP | 功能描述:开发软件 Crypto Bundle BU Solution RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-TRIETHERNET | 功能描述:开发软件 Triple Speed Ethernt MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-TRIETHERNETF | 功能描述:开发软件 3x Spd Ethernet MAC MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IP-R-UNIV-CORE | 制造商:Brady Corporation 功能描述:UNIVERSAL RIBBON CORE; For Use With:Bradys IP Printer ;RoHS Compliant: NA |
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