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| 型号： | IPR-SLITE2 |
| 厂商： | Altera |
| 文件页数： | 38/110页 |
| 文件大小： | 0K |
| 描述： | IP SERIALLITE II RENEW |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | SerialLite II 协议 |
| 许可证： | 续用许可证 |
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Chapter 3: Parameter Settings
Link Layer Configuration
Retry-on-error Operation Example
Figure 3–10. Retry-On-Error Example
3–15
Device A
Device B
1
Seg_A; Seg_B; Seg_C
2
_T;
Seg
Seg
_S;
Seg
_U
3
ACK _A; NAC
K _B
4
5
ACK _S;
A C K _T; A C
K_U
S g _B; S
e g_C
6
Res end
e
ACK _B;
ACK _C
7
(1) Device A transmits Seg_A, Seg_B, and Seg_C to Device B.
(2) At the same time, Device B transmits Seg_S, Seg_T, and Seg_U to Device A.
(3) Device B properly receives Seg_A, but detects an error with Seg_B.
(4) Device B returns positive acknowledge for Seg_A, but requests retransmission of Seg_B. Device B discards all
subsequently received segments until Seg_B is received again.
(5) Device A acknowledges the proper reception of Seg_S; Seg_T; and Seg_U.
(6) Device A resends all segments starting from Seg_B.
(7) Finally, Device B acknowledges the proper reception of Seg_B and Seg_C.
Flow Control
The SerialLite II MegaCore function provides the Enable flow control parameter as
an optional means of exerting backpressure on a data source when data consumption
is too slow. Use this parameter to ensure that the receive FIFO buffers do not overflow.
1
Flow control is only needed when the system logic on the receiving end of the link is
reading the data slower than the system logic on the transmitting end of the link is
sending data.
The flow control feature in the SerialLite II Megacore function operates by having the
receiving end of the link issue a PAUSE instruction to the transmitting end of the link
when threshold of the receiver ’s FIFO buffer is breached. The instruction causes the
transmitter to cease transmission for specified pause duration. Once the pause
duration has expired, the transmission resumes.
Flow Control Operation
When flow control is used, the FIFO buffer is structured as two sections, threshold
and headroom.
January 2014
Altera Corporation
SerialLite II MegaCore Function
User Guide
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IPR-SRAM/QDRII | 功能描述:开发软件 QDRII SRAM Control MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-SSIP | 功能描述:开发软件 Crypto Bundle BU Solution RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-TRIETHERNET | 功能描述:开发软件 Triple Speed Ethernt MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-TRIETHERNETF | 功能描述:开发软件 3x Spd Ethernet MAC MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IP-R-UNIV-CORE | 制造商:Brady Corporation 功能描述:UNIVERSAL RIBBON CORE; For Use With:Bradys IP Printer ;RoHS Compliant: NA |
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