- 您现在的位置：买卖IC网 > PDF目录16076 > IPR-SLITE2 (Altera)IP SERIALLITE II RENEW PDF资料下载
参数资料
| 型号： | IPR-SLITE2 |
| 厂商： | Altera |
| 文件页数： | 95/110页 |
| 文件大小： | 0K |
| 描述： | IP SERIALLITE II RENEW |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | SerialLite II 协议 |
| 许可证： | 续用许可证 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页当前第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页
Chapter 5: Testbench
Testbench Components Description
5–9
■
■
The internal counter that controls the duration of the digital resets to the ALTGX
megafunction counts up to 20 in simulation. This count overrides the default value
of 20,000.
The clock compensation value determines when the clock compensation sequence
is inserted into the high-speed serial stream (if Clock Compensation is enabled).
In simulation, to minimize the time it takes for the sequence to occur, the value is
always 100 cycles, independent of the actual clock compensation time value —100
or 300 parts per million (ppm).
Atlantic Receiver Behavior
The receiver (Rx) Atlantic interface signals, other than rxhpp/rxrdp_val , can be x
when the rxhpp/rxrdp_val is zero. Therefore, if the user logic uses the receive Atlantic
interface when rxhpp/rxrdp_val is zero, the receiver MegaCore function can transmit
x ’s when data is not valid. This invalid data should not be used during simulation.
To ensure valid data transmission, the receive Atlantic interface should only be
sampled when the rxhpp/rxrdp_val is 1 .
Testbench Components Description
This section describes the testbench components.
DUT
The Verilog HDL or VHDL IP functional simulation model of the device under test
(DUT).
SISTER
A Verilog HDL or VHDL IP functional simulation model used to test the DUT. When
the DUT is asymmetric (for example, the number of receiving lanes is different than
the number of transmitting lanes), is configured in single mode (receiver or
transmitter only), or is configured in broadcast mode, the SISTER parameters may not
match the DUT parameters, or multiple SISTER MegaCore functions may need to be
instantiated.
AGEN
This testbench includes separate versions of the AGEN module for Verilog HDL and
VHDL.
Verilog HDL
This Verilog HDL version of the AGEN module generates Atlantic data for the
SerialLite II demonstration testbench ( agen_dat_dut , agen_pri_dut , agen_dat_sis ,
agen_pri_sis , and so on). The data pattern is based on an LFSR to create a predictable
but non-incrementing (pseudo-random) pattern.
This module features few tasks, the main one being the send_packet task that
transmits packets into the SerialLite II MegaCore function. It also supports the
streaming mode if the data port is configured as such.
January 2014
Altera Corporation
SerialLite II MegaCore Function
User Guide
相关PDF资料 |
PDF描述 |
|---|---|
| EBM28DRMN-S288 | CONN EDGECARD 56POS .156 EXTEND |
| RSM08DTKI-S288 | CONN EDGECARD 16POS .156 EXTEND |
| ECM06DTMD-S273 | CONN EDGECARD 12POS R/A .156 SLD |
| ECM06DTMN-S273 | CONN EDGECARD 12POS R/A .156 SLD |
| RBM12DCCI-S189 | CONN EDGECARD 24POS R/A .156 SLD |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IPR-SRAM/QDRII | 功能描述:开发软件 QDRII SRAM Control MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-SSIP | 功能描述:开发软件 Crypto Bundle BU Solution RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-TRIETHERNET | 功能描述:开发软件 Triple Speed Ethernt MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-TRIETHERNETF | 功能描述:开发软件 3x Spd Ethernet MAC MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IP-R-UNIV-CORE | 制造商:Brady Corporation 功能描述:UNIVERSAL RIBBON CORE; For Use With:Bradys IP Printer ;RoHS Compliant: NA |
发布紧急采购，3分钟左右您将得到回复。