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参数资料
| 型号： | IPR-SLITE2 |
| 厂商： | Altera |
| 文件页数： | 35/110页 |
| 文件大小： | 0K |
| 描述： | IP SERIALLITE II RENEW |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | SerialLite II 协议 |
| 许可证： | 续用许可证 |
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3–12
Chapter 3: Parameter Settings
Link Layer Configuration
If this parameter is enabled, all link layer basic parameters, including data and
priority ports, and buffering are disabled (grayed out).
Regular Data Port
A cut-through data flow is implemented for data packets. Packet data is transmitted
as soon as enough data is received to fill a column, without waiting for the entire
packet to be delivered to the transmitter. This approach provides the lowest latency.
There is no packet size limitation.
Priority Port
The data flow for priority packets depends upon whether Retry-on-error is enabled.
Retry-on-error Disabled
A cut-through data flow is implemented for priority packets. Priority packet data is
transmitted as soon as enough data is received to fill a column, without waiting for
the entire packet to be delivered to the transmitter. This approach provides the lowest
latency. There is no packet size limitation. As the name implies, priority packets have
precedence over data packets. The SerialLite II MegaCore function inserts high
priority packets within a data packet that is already in transmission (nesting packets).
Retry-on-error Enabled
A store-and-forward data flow is implemented for priority packet segments. Priority
packets are broken into SEGMENT_SIZE bytes that are buffered and sent across the link.
The transmission of data does not start until a segment or an end of packet has been
delivered to the transmitter. Therefore, priority packets less than or equal to
SEGMENT_SIZE bytes are buffered before transmission. This buffering is required to
support the Retry-on-error option, which is only allowed for priority packets. As the
name implies, priority packets have precedence over data packets. The SerialLite II
MegaCore function inserts high priority packets within a data packet that is already in
transmission (nesting packets). There is also no maximum packet size limitation.
If a packet is larger than a SEGMENT_SIZE , a full segment must be queued before it can
be transmitted. This queueing may result in mid-packet backpressure on the priority
port Atlantic interface. Segment interleaving, priority segments destined for different
ports, is fully supported, as long as the address change occurs on a segment boundary.
Segment Size
Segment size is only applicable when the Retry-on-error parameter is turned on.
Priority packets are broken into segments of SEGMENT_SIZE bytes and sent across the
link. Priority packets less than or equal to SEGMENT_SIZE bytes and without an end
marker are buffered before transmission.
The SEGMENT_SIZE parameter settings range from 8 to 2,048 bytes in 2 n increments,
and the default value is 256 bytes.
SerialLite II MegaCore Function
User Guide
January 2014 Altera Corporation
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IPR-SRAM/QDRII | 功能描述:开发软件 QDRII SRAM Control MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-SSIP | 功能描述:开发软件 Crypto Bundle BU Solution RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-TRIETHERNET | 功能描述:开发软件 Triple Speed Ethernt MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPR-TRIETHERNETF | 功能描述:开发软件 3x Spd Ethernet MAC MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IP-R-UNIV-CORE | 制造商:Brady Corporation 功能描述:UNIVERSAL RIBBON CORE; For Use With:Bradys IP Printer ;RoHS Compliant: NA |
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