![](http://datasheet.mmic.net.cn/120000/S1C17564F00E10C_datasheet_3574343/S1C17564F00E10C_108.png)
11 16-BIT PWM TIMERS (T16A)
S1C17554/564 TECHNICAL MANUAL
Seiko Epson Corporation
11-7
Counter block Ch.1
Comparator/capture block Ch.1
Clock controller Ch.1
Counter block Ch.0
Comparator/capture block Ch.0
Clock controller Ch.0
Counter block Ch.2
Comparator/capture block Ch.2
Clock controller Ch.2
Counter block Ch.3
Comparator/capture block Ch.3
Clock controller Ch.3
T16A
IOSC*
OSC3
OSC1
EXCL1
IOSC*
OSC3
OSC1
EXCL0
IOSC*
OSC3
OSC1
EXCL2
IOSC*
OSC3
OSC1
EXCL3
* Available only in S1C17564
TOUT6/7
CAP6/7
Interrupt
request
TOUT4/5
CAP4/5
Interrupt
request
TOUT2/3
CAP2/3
Interrupt
request
TOUT0/1
CAP0/1
Interrupt
request
4.3.1 Timer Configuration in Normal Channel Mode (two comparator/capture blocks
× four channels)
Figure 11.
Note: Do not connect a counter block to a comparator/capture block in a different channel in normal
channel mode (MULTIMD = 0), as normal operation cannot be guaranteed.
Multi-comparator/capture mode (MULTIMD = 1)
In order to set three or more comparison values for one counter or to capture the contents of one counter using
three or more trigger signals, two or more comparator/capture blocks can be connected to one counter. Multi-
comparator/capture mode is provided for this purpose. In this mode, any counter block can be combined with
the comparator/capture blocks using CCABCNT[1:0] described above. Note, however, that the count clock is
fixed at one type for counter Ch.0, regardless of the counter to be used. The clock settings for Ch.1 to Ch.3 are
ineffective.
Counter block Ch.1
Comparator/capture block Ch.1
Clock controller Ch.1
Counter block Ch.0
Comparator/capture block Ch.0
Clock controller Ch.0
Counter block Ch.2
Comparator/capture block Ch.2
Clock controller Ch.2
Counter block Ch.3
Comparator/capture block Ch.3
Clock controller Ch.3
TOUT6/7
CAP6/7
Interrupt
request
TOUT4/5
CAP4/5
Interrupt
request
TOUT2/3
CAP2/3
Interrupt
request
TOUT0/1
CAP0/1
Interrupt
request
T16A
IOSC*
OSC3
OSC1
EXCL1
IOSC*
OSC3
OSC1
EXCL0
IOSC*
OSC3
OSC1
EXCL2
IOSC*
OSC3
OSC1
EXCL3
* Available only in S1C17564
(1) Configuration Example 1 (four comparator/capture blocks
× two channels)
Counter block Ch.1
Comparator/capture block Ch.1
Clock controller Ch.1
Counter block Ch.0
Comparator/capture block Ch.0
Clock controller Ch.0
T16A
Counter block Ch.2
Comparator/capture block Ch.2
Clock controller Ch.2
Counter block Ch.3
Comparator/capture block Ch.3
Clock controller Ch.3
TOUT6/7
CAP6/7
Interrupt
request
TOUT4/5
CAP4/5
Interrupt
request
TOUT2/3
CAP2/3
Interrupt
request
TOUT0/1
CAP0/1
Interrupt
request
IOSC*
OSC3
OSC1
EXCL1
IOSC*
OSC3
OSC1
EXCL0
IOSC*
OSC3
OSC1
EXCL2
IOSC*
OSC3
OSC1
EXCL3
* Available only in S1C17564
(2) Configuration Example 2 (eight comparator/capture blocks
× one channel)
4.3.2 Timer Configuration Example in Multi-Comparator/Capture Mode
Figure 11.