![](http://datasheet.mmic.net.cn/120000/S1C17564F00E10C_datasheet_3574343/S1C17564F00E10C_221.png)
19 UNIVERSAL SERIAL INTERFACE (USI) [S1C17564]
19-34
Seiko Epson Corporation
S1C17554/564 TECHNICAL MANUAL
USI Ch.x I2C Slave Mode Interrupt Flag Registers (USI_ISIFx)
Register name Address
Bit
Name
Function
Setting
Init. R/W
Remarks
USI Ch.x I2C
Slave Mode
Interrupt Flag
Register
(USI_ISIFx)
0x50cf
0x50ef
(8 bits)
D7–6 –
reserved
–
0 when being read.
D5
ISBSY
I2C slave busy flag
1 Busy
0 Standby
0
R
D4–2 ISSTA[2:0] I2C slave status
ISSTA[2:0]
Status
0x0
R
0x7
0x6
0x5
0x4
0x3
0x2
0x1
0x0
reserved
NAK received
ACK received
ACK/NAK sent
Rx buffer full
Tx buffer empty
Stop detected
Start detected
D1
ISEIF
Overrun error flag
1 Error
0 Normal
0
R/W Reset by writing 1.
D0
ISIF
Operation completion flag
1 Completed 0 Not completed
0
R/W
Note: This register is effective only in I2C slave mode. Configure the USI channel to I2C slave mode be-
fore this register can be used.
D[7:6]
Reserved
D5
ISBSY: I2C Slave Busy Flag Bit
Indicates the I2C slave operation status.
1 (R):
Busy
0 (R):
Standby (default)
Writing 1 to ISTG/USI_ISTGx register (starting an I2C slave operation) sets ISBSY to 1 indicating that
the I2C controller is busy (operating). When the specified operation has finished, ISBSY is reset to 0.
D[4:2]
ISSTA[2:0]: I2C Slave Status Bits
Indicates the I2C slave status.
8.6 I
Table 19.
2C Slave Status Bits
ISSTA[2:0]
Status
0x7
Reserved
0x6
NAK has been received.
0x5
ACK has been received.
0x4
ACK or NAK has been transmitted.
0x3
Receive data buffer is full.
0x2
Transmit data buffer is empty.
0x1
Stop condition has been detected.
0x0
Start condition has been detected.
(Default: 0x0)
When an operation completion interrupt occurs, read ISSTA[2:0] to check the operation that has been
finished.
D1
ISEIF: Overrun Error Flag Bit
Indicates whether an overrun error has occurred or not.
1 (R):
Error occurred
0 (R):
No error (default)
1 (W):
Reset to 0
0 (W):
Ignored
ISEIF is set to 1 when an overrun error occurs. At the same time a receive error interrupt request is sent
to the ITC if ISEIE/USI_ISIEx register is 1. An overrun error occurs when the previous received data in
the receive data buffer before reading is overwritten with a new received data. ISEIF is reset by writing 1.
D0
ISIF: Operation Completion Flag Bit
Indicates whether the triggered operation has completed or not.
1 (R):
Completed
0 (R):
Not completed (default)
1 (W):
Reset to 0
0 (W):
Ignored