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8 I/O PORTS (P)
8-2
Seiko Epson Corporation
S1C17554/564 TECHNICAL MANUAL
Input/Output Pin Function Selection (Port MUX)
8.2
The I/O port pins share peripheral module input/output pins. Each pin can be configured for use as an I/O port or
for a peripheral module function via the corresponding port function-select bits. Pins not used for peripheral mod-
ules can be used as general-purpose I/O ports.
2.1 Input/Output Pin Function Selection
Table 8.
Pin function 1
PxyMUX[1:0] = 0x0
Pin function 2
PxyMUX[1:0] = 0x1
Pin function 3
PxyMUX[1:0] = 0x2
Pin function 4
PxyMUX[1:0] = 0x3
Port function select bits
P00
AIN0 (ADC10)
–
P00MUX[1:0]/P00_03PMUX register
P01
AIN1 (ADC10)
–
P01MUX[1:0]/P00_03PMUX register
P02
AIN2 (ADC10)
US_SSI0 (USI)*
–
P02MUX[1:0]/P00_03PMUX register
P03
AIN3 (ADC10)
US_SSI1 (USI)*
–
P03MUX[1:0]/P00_03PMUX register
P10
SDI0 (SPI)
–
P10MUX[1:0]/P10_13PMUX register
P11
SDO0 (SPI)
–
P11MUX[1:0]/P10_13PMUX register
P12
SPICLK0 (SPI)
–
P12MUX[1:0]/P10_13PMUX register
P13
#SPISS0 (SPI)
TOUT5/CAP5 (T16A)
–
P13MUX[1:0]/P10_13PMUX register
P14
SIN1 (UART)
SDI1 (SPI)
–
P14MUX[1:0]/P14_17PMUX register
P15
SOUT1 (UART)
SDO1 (SPI)
–
P15MUX[1:0]/P14_17PMUX register
P16
SCLK1 (UART)
SPICLK1 (SPI)
–
P16MUX[1:0]/P14_17PMUX register
P17
SCL0 (I2CM)
–
P17MUX[1:0]/P14_17PMUX register
P20
TOUT2/CAP2 (T16A)
–
P20MUX[1:0]/P20_23PMUX register
P21
TOUT3/CAP3 (T16A)
–
P21MUX[1:0]/P20_23PMUX register
P22/EXCL1 (T16A)
FOUTB (CLG)
–
P22MUX[1:0]/P20_23PMUX register
P23/EXCL2 (T16A)
SDI2 (SPI)
–
P23MUX[1:0]/P20_23PMUX register
P24/EXCL3 (T16A)
SDO2 (SPI)
–
P24MUX[1:0]/P24_27PMUX register
P25
#BFR (I2CS)
#SPISS2 (SPI)
–
P25MUX[1:0]/P24_27PMUX register
P26
SDA1 (I2CS)
–
P26MUX[1:0]/P24_27PMUX register
P27
SCL1 (I2CS)
–
P27MUX[1:0]/P24_27PMUX register
P30
TOUT0/CAP0 (T16A)
–
P30MUX[1:0]/P30_33PMUX register
P31
#BFR (I2CS)
#ADTRG (ADC10)
–
P31MUX[1:0]/P30_33PMUX register
P32
TOUT4/CAP4 (T16A) FOUTA (CLG)
–
P32MUX[1:0]/P30_33PMUX register
P33
REMI (REMC)
SPICLK2 (SPI)
–
P33MUX[1:0]/P30_33PMUX register
P34
REMO (REMC)
#SPISS1 (SPI)
–
P34MUX[1:0]/P34_37PMUX register
DCLK (DBG)
P35
–
P35MUX[1:0]/P34_37PMUX register
DSIO (DBG)
P36
–
P36MUX[1:0]/P34_37PMUX register
DST2 (DBG)
P37
–
P37MUX[1:0]/P34_37PMUX register
P40
SIN0 (UART)
TOUT6/CAP6 (T16A)
–
P40MUX[1:0]/P40_43PMUX register
P41
SOUT0 (UART)
TOUT7/CAP7 (T16A)
–
P41MUX[1:0]/P40_43PMUX register
P42
SCLK0 (UART)
TOUT1/CAP1 (T16A)
–
P42MUX[1:0]/P40_43PMUX register
P43
SDA1 (I2CS)
REMI (REMC)
–
P43MUX[1:0]/P40_33PMUX register
P44
SCL1 (I2CS)
REMO (REMC)
–
P44MUX[1:0]/P44_45PMUX register
P45/EXCL0 (T16A)
SDA0 (I2CM)
–
P45MUX[1:0]/P44_45PMUX register
P50
US_SDI0 (USI)*
–
P50MUX[1:0]/P50_53PMUX register
P51
US_SDO0 (USI)*
–
P51MUX[1:0]/P50_53PMUX register
P52
US_SCK0 (USI)*
–
P52MUX[1:0]/P50_53PMUX register
P53
US_SDI1 (USI)*
–
P53MUX[1:0]/P50_53PMUX register
P54
US_SDO1 (USI)*
–
P54MUX[1:0]/P54_55PMUX register
P55
US_SCK1 (USI)*
–
P55MUX[1:0]/P54_55PMUX register
* Available only in S1C17564
At initial reset, each I/O port pin (Pxy) is initialized for the default function (“Pin function 1” in Table 8.2.1).
Pins P22, P23, P24, and P45 can also be used as 16-bit PWM timer external clock input pins by setting them to in-
put mode. However, general-purpose input port function is also effective in this case.
For information on functions other than the I/O ports, see the descriptions of the peripheral modules indicated in
parentheses. The sections below describe port functions with the pins set as general-purpose I/O ports.