11 16-BIT PWM TIMERS (T16A)
11-12
Seiko Epson Corporation
S1C17554/564 TECHNICAL MANUAL
Notes: Reset the interrupt flag before enabling interrupts with the interrupt enable bit to prevent oc-
currence of unwanted interrupt. The interrupt flag is reset by writing 1.
After an interrupt occurs, the interrupt flag in the T16A module must be reset in the interrupt
handler routine.
Control Register Details
11.8
8.1 List of T16A Registers
Table 11.
Address
Register name
Function
0x5068
T16A_CLK0
T16A Clock Control Register Ch.0
Controls the T16A Ch.0 clock.
0x5069
T16A_CLK1
T16A Clock Control Register Ch.1
Controls the T16A Ch.1 clock.
0x506a
T16A_CLK2
T16A Clock Control Register Ch.2
Controls the T16A Ch.2 clock.
0x506b
T16A_CLK3
T16A Clock Control Register Ch.3
Controls the T16A Ch.3 clock.
0x5400
T16A_CTL0
T16A Counter Ch.0 Control Register
Controls the counter.
0x5402
T16A_TC0
T16A Counter Ch.0 Data Register
Counter data
0x5404
T16A_CCCTL0 T16A Comparator/Capture Ch.0 Control Register
Controls the comparator/capture block and TOUT.
0x5406
T16A_CCA0
T16A Compare/Capture Ch.0 A Data Register
Compare A/capture A data
0x5408
T16A_CCB0
T16A Compare/Capture Ch.0 B Data Register
Compare B/capture B data
0x540a
T16A_IEN0
T16A Compare/Capture Ch.0 Interrupt Enable Register Enables/disables interrupts.
0x540c
T16A_IFLG0
T16A Compare/Capture Ch.0 Interrupt Flag Register
Displays/sets interrupt occurrence status.
0x5420
T16A_CTL1
T16A Counter Ch.1 Control Register
Controls the counter.
0x5422
T16A_TC1
T16A Counter Ch.1 Data Register
Counter data
0x5424
T16A_CCCTL1 T16A Comparator/Capture Ch.1 Control Register
Controls the comparator/capture block and TOUT.
0x5426
T16A_CCA1
T16A Compare/Capture Ch.1 A Data Register
Compare A/capture A data
0x5428
T16A_CCB1
T16A Compare/Capture Ch.1 B Data Register
Compare B/capture B data
0x542a
T16A_IEN1
T16A Compare/Capture Ch.1 Interrupt Enable Register Enables/disables interrupts.
0x542c
T16A_IFLG1
T16A Compare/Capture Ch.1 Interrupt Flag Register
Displays/sets interrupt occurrence status.
0x5440
T16A_CTL2
T16A Counter Ch.2 Control Register
Controls the counter.
0x5442
T16A_TC2
T16A Counter Ch.2 Data Register
Counter data
0x5444
T16A_CCCTL2 T16A Comparator/Capture Ch.2 Control Register
Controls the comparator/capture block and TOUT.
0x5446
T16A_CCA2
T16A Compare/Capture Ch.2 A Data Register
Compare A/capture A data
0x5448
T16A_CCB2
T16A Compare/Capture Ch.2 B Data Register
Compare B/capture B data
0x544a
T16A_IEN2
T16A Compare/Capture Ch.2 Interrupt Enable Register Enables/disables interrupts.
0x544c
T16A_IFLG2
T16A Compare/Capture Ch.2 Interrupt Flag Register
Displays/sets interrupt occurrence status.
0x5460
T16A_CTL3
T16A Counter Ch.3 Control Register
Controls the counter.
0x5462
T16A_TC3
T16A Counter Ch.3 Data Register
Counter data
0x5464
T16A_CCCTL3 T16A Comparator/Capture Ch.3 Control Register
Controls the comparator/capture block and TOUT.
0x5466
T16A_CCA3
T16A Compare/Capture Ch.3 A Data Register
Compare A/capture A data
0x5468
T16A_CCB3
T16A Compare/Capture Ch.3 B Data Register
Compare B/capture B data
0x546a
T16A_IEN3
T16A Compare/Capture Ch.3 Interrupt Enable Register Enables/disables interrupts.
0x546c
T16A_IFLG3
T16A Compare/Capture Ch.3 Interrupt Flag Register
Displays/sets interrupt occurrence status.
The T16A registers are described in detail below.
Note: When data is written to the registers, the “Reserved” bits must always be written as 0 and not 1.