AMD Alchemy Au1550 Security Network Processor Data Book
347
Primary General Purpose I/O and Pin Functionality
30283D
Table 10-6 shows the GPIO control registers and the associated offsets from sys_base. Certain registers share offsets and
have different functionality depending on whether the access is a read or a write. The register descriptions detail the func-
tionality of each register. Bit n of a particular register should be associated with GPIO[n] for all registers except
sys_pininputen.
10.3.2.1
GPIO Control Registers
Each GPIO control register is 32 bits wide with bit n in each register affecting GPIO[n].
These registers reset to default values only on a hardware reset; they retain their values during a runtime reset and during
Sleep.
Table 10-6. GPIO Control Registers
Offset (Note 1)
Register Name
Description
Default
Reset Type
0x0100
sys_trioutrd
The TRI-STATE/Output state register shows the current state
of the GPIO.
0
GPIO[n] is in TRI-STATE. To put GPIO[n] in TRI-STATE
is accomplished by setting the corresponding bit in the
sys_trioutclr register.
1
Output is enabled. Enabling GPIO[n] as an output is
accomplished by programming GPIO[n] as a 0 or 1 using
the sys_outputclr[n] or sys_outputset[n] registers.
If the pin is not an output it should be in TRI-STATE.
0: All GPIOs
are in
TRI-STATE.
Hardware
0x0100
sys_trioutclr
0x0108
sys_outputrd
Controls the state of the GPIO[n] as an output.
0
To output a low level, set sys_outputclr[n].
1
To output a high level, set sys_outputset[n].
Programming a bit value in the output register brings the pin
out of TRI-STATE mode and enables the output.
UNPRED
Hardware
0x0108
sys_outputset
0x010C
sys_outputclr
0x0110
sys_pinstaterd
Allows the pin state to be read when an input. This register
also gives the output state.
UNPRED
Hardware
0x0110
sys_pininputen
Writing to this register allows the system to use GPIO[7:0] as
external inputs to wake the processor from Sleep. This regis-
ter must be written before any GPIO[7:0] signal can be used
as a Sleep wakeup input source.
UNPRED
sys_trioutrd
Offset = 0x0100
sys_trioutclr
Offset = 0x0100
sys_outputrd
Offset = 0x0108
sys_outputset
Offset = 0x0108
sys_outputclr
Offset = 0x010C
sys_pinstaterd
Offset = 0x0110
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9876543210
FUNC[31:0]
Bits
Name
Description
R/W
Default
31:0
FUNC[n]
347. FUNC[n] controls the functionality of GPIO[n].
…rd - read only
…set - write only
…clr - write only
default values at
hardware reset.