354
AMD Alchemy Au1550 Security Network Processor Data Book
Power Management
30283D
10.4.4.4
FWTOY# and WAKE# Signals
Two signals support Hibernate mode: FWTOY# and WAKE#. FWTOY# is an input signal used to maintain the TOY and
associated timers during Hibernate mode. The FWTOY# signal must be asserted before or with VDDXOK, and before
VDDX drops. The system can drop VDDX and place the processor in Hibernate at any time, provided it asserts FWTOY#
while VDDX is still high. During Hibernate, FWTOY# must be held asserted; VDDXOK may be unpredictable as VDDX floats
Figure 10-9. FWTOY# and the Hibernate Sequence
WAKE# is an output signal which asserts when a TOY match (in sys_toymatch2) occurs with Hibernate timer match
enabled (sys_wakemsk[D2] = 1). This is known as a Hibernate wakeup and is essentially the same as a hardware reset.
WAKE# remains asserted after a Hibernate wakeup until software clears the wakeup cause (sys_wakesrc[M2D]). This can
be used to implement an alarm clock feature: put the system into Hibernate and have it wake itself up a fixed time later.
WAKE# is a pull-down only, so that the system can wire NOR Hibernate wakeup events from different voltage domains into
one signal, with an external pull-up to an appropriate voltage.
When removing and reasserting XPWR32, such as when swapping out a battery, the value of WAKE# is undefined when
the power is reapplied. To avoid power-up at the reinsertion of a battery, the system designer can qualify WAKE# with an
external signal.
10.4.4.5
System Configuration for Hibernate
Using Hibernate (FWTOY# = VDDXOK)
One design option for a Hibernate system is to use VDDXOK to signal a Hibernate wakeup. In this case, the equation for
Hibernate is: FWTOY# = VDDXOK.
Every VDDXOK rise appears as a Hibernate wakeup as shown in
Figure 10-10. This ensures the TOY is never reset.
Figure 10-10. Hibernate: Tie FWTOY# to VDDXOK
XPWR32 is tied to a supply, such as a battery, which is always up even during Hibernate. For the first rise of VDDXOK after
inserting the battery, the burden is on the system to determine that the 32 kHz oscillator needs to be enabled and the time
needs to be set.
Note that this is not a battery backup system for VDDX; lack of power to XPWR32 prevents the processor from booting even
if VDDX is present.
VDDXOK
VDDX
FWTOY#
Tfwb:
Begin Hibernate at least 100 s before 90% of VDDX.
Tmok:
VDDXOK negated at least 1 s before asserting again.
Tfwe:
End Hibernate [min = 100 s, max = 20 ms] after VDDXOK asserts.
Tmok
Tfwb
Tfwe
VDDXOK
VDDX
FWTOY#
Tfwb
Tfwb: Begin firewall at least 0 s before VDDX.
When is FWTOY# tied to VDDXOK, FWTOY# is always sampled as asserted at rise of VDDXOK.