AMD Alchemy Au1550 Security Network Processor Data Book
181
Security Engine
30283D
7.3.4.3
Command Queue Source Address Register
The command queue source address (sec_qsrcaddr) contains the base address for the packet to be processed.
7.3.4.4
Command Queue Destination Address Register
The command queue destination address (sec_qdstaddr) contains the base address for the result data from the requested
operation.
1:0
ED, HD
Security Engine Done (ED). Written by the security engine and read by the
calling application. A ‘1’ specifies that the security engine has finished pro-
cessing this descriptor and has returned ownership to the host.
Host Done (HD). Written by the calling application and read by the security
engine. A ‘1’ specifies that the host has populated the descriptor and that
the security engine can begin processing this descriptor.
The security engine reads HD only in Descriptor Ring mode
(sec_glbdmacfg[PE]=1 and sec_glbrsize[SIZE] > 0); it is ignored when
directly writing to the command queue (sec_glbdmacfg[PE]=0) or
(sec_glbdmacfg[PE]=1 and sec_glbrsize[SIZE]=0). In these cases, the
command (descriptor) is triggered by the write of the last word in the com-
mand queue.
ED and HD can be seen as a 2-bit control field:
00
Unassigned, security engine ignores.
01
Host has prepared source data and descriptor; security engine now
owns.
10
Security engine done; ownership returned to the Host.
11
Reserved
When descriptor ring mode is not enabled (direct writes to command
queue), ED and HD are ignored by the packet engine. However, once the
command queue has seized one of the two crypto contexts in the PE,
these bits read back ‘01’. Once processing has finished, they read back
‘10’.
R/W
10
sec_qsrcaddr
Offset = 0x0004
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9876543210
SADDR
Def. 00000000000000000000000000000000
Bits
Name
Description
R/W
Default
31:0
SADDR
Packet Source Address. Specifies the starting address for the packet to be
processed. This address does not have to be on a word boundary; how-
ever, cache line or word alignment is recommended.
R/W
0
sec_qdstaddr
Offset = 0x0008
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9876543210
DADDR
Def. 00000000000000000000000000000000
Bits
Name
Description
R/W
Default
31:0
DADDR
Packet Destination Address. Specifies the starting address at which to
write the result data from the requested operation. This address does not
have to be on a word boundary; however, cache line or word alignment is
recommended.
R/W
0
Bits
Name
Description
R/W
Default