Dynamic ODT
In certain application cases, and to further enhance signal integrity on the data bus, it is
desirable that the termination strength of the DDR3 SDRAM can be changed without
issuing an MRS command, essentially changing the ODT termination on the fly. With
dynamic ODT (RTT(WR)) enabled, the DRAM switches from nominal ODT (RTT,nom) to
dynamic ODT (RTT(WR)) when beginning a WRITE burst and subsequently switches back
to nominal ODT (RTT,nom) at the completion of the WRITE burst. This requirement is
supported by the dynamic ODT feature, as described below.
Functional Description
The dynamic ODT mode is enabled if either MR2[9] or MR2[10] is set to 1. Dynamic
ODT is not supported during DLL disable mode so RTT(WR) must be disabled. The dynam-
ic ODT function is described below:
Two RTT values are available—RTT,nom and RTT(WR)
– The value for RTT,nom is preselected via MR1[9, 6, 2]
– The value for RTT(WR) is preselected via MR2[10, 9]
During DRAM operation without READ or WRITE commands, the termination is con-
trolled
– Nominal termination strength RTT,nom is used
– Termination on/off timing is controlled via the ODT ball and latencies ODTL on
and ODTL off
When a WRITE command (WR, WRAP, WRS4, WRS8, WRAPS4, WRAPS8) is registered,
and if dynamic ODT is enabled, the ODT termination is controlled
– A latency of ODTLcnw after the WRITE command: termination strength RTT,nom
switches to RTT(WR)
– A latency of ODTLcwn8 (for BL8, fixed or OTF) or ODTLcwn4 (for BC4, fixed or
OTF) after the WRITE command: termination strength RTT(WR) switches back to
RTT,nom
– On/off termination timing is controlled via the ODT ball and determined by ODTL
on, ODTL off, ODTH4, and ODTH8
– During the tADC transition window, the value of RTT is undefined
ODT is constrained during writes and when dynamic ODT is enabled (see
Table 84Table 84: Dynamic ODT Specific Parameters
Symbol
Description
Begins at
Defined to
Definition for All
DDR3 Speed Bins Units
ODTLcnw
Change from RTT,nom to
RTT(WR)
Write registration
RTT switched from RTT,nom
to RTT(WR)
WL - 2
tCK
ODTLcwn4
Change from RTT(WR) to
RTT,nom (BC4)
Write registration
RTT switched from RTT(WR)
to RTT,nom
4tCK + ODTL off
tCK
ODTLcwn8
Change from RTT(WR) to
RTT,nom (BL8)
Write registration
RTT switched from RTT(WR)
to RTT,nom
6tCK + ODTL off
tCK
tADC
RTT change skew
ODTLcnw completed
RTT transition complete
0.5tCK ± 0.2tCK
tCK
2Gb: x4, x8, x16 DDR3 SDRAM
Dynamic ODT
PDF: 09005aef826aaadc
2Gb_DDR3_SDRAM.pdf – Rev. K 04/10 EN
191
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