![](http://datasheet.mmic.net.cn/200000/MT41J128M16HA-107-D_datasheet_15084792/MT41J128M16HA-107-D_57.png)
ODT Characteristics
ODT effective resistance RTT is defined by MR1[9, 6, and 2]. ODT is applied to the DQ,
DM, DQS, DQS#, and TDQS, TDQS# balls (x8 devices only). The ODT target values and
al pull-up and pull-down resistors (RTT(PU) and RTT(PD)) are defined as follows:
RTT(PU) = (VDDQ - VOUT)/|IOUT|, under the condition that RTT(PD) is turned off
RTT(PD) = (VOUT)/|IOUT|, under the condition that RTT(PU) is turned off
Figure 22: ODT Levels and I-V Characteristics
RTT(PU)
RTT(PD)
ODT
Chip in termination mode
VDDQ
DQ
VSSQ
IOUT = IPD - IPU
IPU
IPD
IOUT
VOUT
To
other
circuitry
such as
RCV, . . .
Table 32: On-Die Termination DC Electrical Characteristics
Parameter/Condition
Symbol
Min
Nom
Max
Units
Notes
RTT effective impedance
RTT(EFF)
Deviation of VM with respect to
VDDQ/2
ΔVM
–5
+5
%
Notes: 1. Tolerance limits are applicable after proper ZQ calibration has been performed at a sta-
ble temperature and voltage (VDDQ = VDD, VSSQ = VSS). Refer to ODT Sensitivity (page 59) if either the temperature or voltage changes after calibration.
2. Measurement definition for RTT: Apply VIH(AC) to pin under test and measure current
I[VIH(AC)], then apply VIL(AC) to pin under test and measure current I[VIL(AC)]:
RTT = -------------------------------------------
VIH(AC) – VIL(AC)
|I(VIH(AC)) - I(VIL(AC))|
3. Measure voltage (VM) at the tested pin with no load:
ΔVM = -----------------
– 1 × 100
2 × VM
Vddq
(
)
4. For IT and AT (1Gb only) devices, the minimum values are derated by 6% when the de-
vice operates between –40°C and 0°C (TC).
ODT Resistors
values provided are not specification requirements; however, they can be used as de-
sign guidelines to indicate what RTT is targeted to provide:
RTT 120Ω is made up of RTT120(PD240) and RTT120(PU240)
RTT 60Ω is made up of RTT60(PD120) and RTT60(PU120)
2Gb: x4, x8, x16 DDR3 SDRAM
ODT Characteristics
PDF: 09005aef826aaadc
2Gb_DDR3_SDRAM.pdf – Rev. K 04/10 EN
57
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