![](http://datasheet.mmic.net.cn/200000/MT41J128M16HA-107-D_datasheet_15084792/MT41J128M16HA-107-D_92.png)
Table 57: Electrical Characteristics and AC Operating Conditions for Speed Extensions (Continued)
Notes 1–8 apply to the entire table
Parameter
Symbol
DDR3-1866
Units
Notes
Min
Max
Power-down entry period: ODT either
synchronous or asynchronous
PDE
Greater of tANPD or tRFC -
REFRESH command to CKE
LOW time
CK
Power-down exit period: ODT either
synchronous or asynchronous
PDX
tANPD + tXPDLL
CK
Power-Down Entry Minimum Timing
ACTIVATE command to power-down entry
tACTPDEN
MIN = 2
CK
PRECHARGE/PRECHARGE ALL command to
power-down entry
tPRPDEN
MIN = 2
CK
REFRESH command to power-down entry
tREFPDEN
MIN = 2
CK
MRS command to power-down entry
tMRSPDEN
MIN = tMOD (MIN)
CK
READ/READ with auto precharge command to power-down entry
tRDPDEN
MIN = RL + 4 + 1
CK
WRITE command to power-down entry BL8 (OTF, MRS) BC4OTF
tWRPDEN
MIN = WL + 4 + tWR/tCK
(AVG)
CK
BC4MRS
tWRPDEN
MIN = WL + 2 + tWR/tCK
(AVG)
CK
WRITE with auto
precharge command to power-down
entry
BL8 (OTF, MRS) BC4OTF
tWRAPDEN
MIN = WL + 4 + WR + 1
CK
BC4MRS
tWRAPDEN
MIN = WL + 2 + WR + 1
CK
Power-Down Exit Timing
DLL on, any valid command, or DLL off to
commands not requiring locked DLL
tXP
MIN = greater of 3CK or 6ns;
MAX = n/a
CK
Precharge power-down with DLL off to
commands requiring a locked DLL
tXPDLL
MIN = greater of 10CK or
24ns; MAX = n/a
CK
ODT Timing
RTT synchronous turn-on delay
ODTL on
CWL + AL - 2CK
CK
RTT synchronous turn-off delay
ODTL off
CWL + AL - 2CK
CK
RTT turn-on from ODTL on reference
tAON
–195
195
ps
RTT turn-off from ODTL off reference
tAOF
0.3
0.7
CK
Asynchronous RTT turn-on delay
(power-down with DLL off)
tAONPD
MIN = 2; MAX = 8.5
ns
2Gb:
x4,
x8,
x16
DDR3
SDRAM
Electrical
Characteristics
and
AC
Operating
Conditions
PDF:
09005aef826aaadc
2Gb_DDR3_SDRAM.pdf
–
Rev.
K
04/10
EN
92
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Technology,
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