![](http://datasheet.mmic.net.cn/200000/MT41J128M16HA-107-D_datasheet_15084792/MT41J128M16HA-107-D_82.png)
Table 56: Electrical Characteristics and AC Operating Conditions (Continued)
Notes 1–8 apply to the entire table
Parameter
Symbol
DDR3-800
DDR3-1066
DDR3-1333
DDR3-1600
Units Notes
Min
Max
Min
Max
Min
Max
Min
Max
Valid clocks before self refresh exit,
power-down exit, or reset exit
tCKSRX
MIN = greater of 5CK or 10ns; MAX = n/a
CK
Power-Down Timing
CKE MIN pulse width
tCKE (MIN) Greater of 3CK
or 7.5ns
Greater of 3CK
or 5.625ns
Greater of 3CK
or 5.625ns
Greater of 3CK
or 5ns
CK
Command pass disable delay
tCPDED
MIN = 1; MAX = n/a
CK
Power-down entry to power-down exit timing
tPD
MIN = tCKE (MIN); MAX = 60ms
CK
Begin power-down period prior to CKE
registered HIGH
tANPD
WL - 1CK
CK
Power-down entry period: ODT either
synchronous or asynchronous
PDE
Greater of tANPD or tRFC - REFRESH command to CKE LOW time
CK
Power-down exit period: ODT either
synchronous or asynchronous
PDX
tANPD + tXPDLL
CK
Power-Down Entry Minimum Timing
ACTIVATE command to power-down entry
tACTPDEN
MIN = 1
CK
PRECHARGE/PRECHARGE ALL command to
power-down entry
tPRPDEN
MIN = 1
CK
REFRESH command to power-down entry
tREFPDEN
MIN = 1
CK
MRS command to power-down entry
tMRSPDEN
MIN = tMOD (MIN)
CK
READ/READ with auto precharge command
to power-down entry
tRDPDEN
MIN = RL + 4 + 1
CK
WRITE command to
power-down entry
BL8 (OTF, MRS)
BC4OTF
tWRPDEN
MIN = WL + 4 + tWR/tCK (AVG)
CK
BC4MRS
tWRPDEN
MIN = WL + 2 + tWR/tCK (AVG)
CK
WRITE with auto
precharge command to
power-down entry
BL8 (OTF, MRS)
BC4OTF
tWRAPDEN
MIN = WL + 4 + WR + 1
CK
BC4MRS
tWRAPDEN
MIN = WL + 2 + WR + 1
CK
Power-Down Exit Timing
DLL on, any valid command, or DLL off to
commands not requiring locked DLL
tXP
MIN = greater of 3CK or 7.5ns;
MAX = n/a
MIN = greater of 3CK or 6ns;
MAX = n/a
CK
Precharge power-down with DLL off to
commands requiring a locked DLL
tXPDLL
MIN = greater of 10CK or 24ns; MAX = n/a
CK
2Gb:
x4,
x8,
x16
DDR3
SDRAM
Electrical
Characteristics
and
AC
Operating
Conditions
PDF:
09005aef826aaadc
2Gb_DDR3_SDRAM.pdf
–
Rev.
K
04/10
EN
82
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Technology,
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2006
Micron
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