![](http://datasheet.mmic.net.cn/200000/MT41J128M16HA-107-D_datasheet_15084792/MT41J128M16HA-107-D_79.png)
Table 56: Electrical Characteristics and AC Operating Conditions (Continued)
Notes 1–8 apply to the entire table
Parameter
Symbol
DDR3-800
DDR3-1066
DDR3-1333
DDR3-1600
Units Notes
Min
Max
Min
Max
Min
Max
Min
Max
DQ Input Timing
Data setup time to
DQS, DQS#
Base (specification)
tDS
AC175
75
–
25
–
ps
VREF @ 1 V/ns
250
–
200
–
ps
Data setup time to
DQS, DQS#
Base (specification)
tDS
AC150
125
–
75
–
30
–
10
–
ps
VREF @ 1 V/ns
275
–
250
–
180
–
160
–
ps
Data setup time to
DQS, DQS#
Base (specification)
tDS
AC135
–
ps
VREF @ 1 V/ns
–
ps
Data hold time from
DQS, DQS#
Base (specification)
tDH
DC100
150
–
100
–
65
–
45
–
ps
VREF @ 1 V/ns
250
–
200
–
165
–
145
–
ps
Minimum data pulse width
tDIPW
600
–
490
–
400
–
360
–
ps
DQ Output Timing
DQS, DQS# to DQ skew, per access
tDQSQ
–
200
–
150
–
125
–
100
ps
DQ output hold time from DQS, DQS#
tQH
0.38
–
0.38
–
0.38
–
0.38
–
tCK
(AVG)
DQ Low-Z time from CK, CK#
tLZ (DQ)
–800
400
–600
300
–500
250
–450
225
ps
DQ High-Z time from CK, CK#
tHZ (DQ)
–
400
–
300
–
250
–
225
ps
DQ Strobe Input Timing
DQS, DQS# rising to CK, CK# rising
tDQSS
–0.25
0.25
–0.25
0.25
–0.25
0.25
–0.27
0.27
CK
DQS, DQS# differential input low pulse width
tDQSL
0.45
0.55
0.45
0.55
0.45
0.55
0.45
0.55
CK
DQS, DQS# differential input high pulse width
tDQSH
0.45
0.55
0.45
0.55
0.45
0.55
0.45
0.55
CK
DQS, DQS# falling setup to CK, CK# rising
tDSS
0.2
–
0.2
–
0.2
–
0.18
–
CK
DQS, DQS# falling hold from CK, CK# rising
tDSH
0.2
–
0.2
–
0.2
–
0.18
–
CK
DQS, DQS# differential WRITE preamble
tWPRE
0.9
–
0.9
–
0.9
–
0.9
–
CK
DQS, DQS# differential WRITE postamble
tWPST
0.3
–
0.3
–
0.3
–
0.3
–
CK
DQ Strobe Output Timing
DQS, DQS# rising to/from rising CK, CK#
tDQSCK
–400
400
–300
300
–255
255
–225
225
ps
DQS, DQS# rising to/from rising CK, CK#
when DLL is disabled
tDQSCK
DLL_DIS
1
10
1
10
1
10
1
10
ns
DQS, DQS# differential output high time
tQSH
0.38
–
0.38
–
0.40
–
0.40
–
CK
DQS, DQS# differential output low time
tQSL
0.38
–
0.38
–
0.40
–
0.40
–
CK
DQS, DQS# Low-Z time (RL - 1)
tLZ (DQS)
–800
400
–600
300
–500
250
–450
225
ps
2Gb:
x4,
x8,
x16
DDR3
SDRAM
Electrical
Characteristics
and
AC
Operating
Conditions
PDF:
09005aef826aaadc
2Gb_DDR3_SDRAM.pdf
–
Rev.
K
04/10
EN
79
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Technology,
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2006
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Inc.
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