![](http://datasheet.mmic.net.cn/200000/MT41J128M16HA-107-D_datasheet_15084792/MT41J128M16HA-107-D_49.png)
4. VREFDQ(DC) may transition to VREFDQ(sr) and back to VREFDQ(DC) when in SELF REFRESH, with-
in restrictions outlined in the SELF REFRESH section.
5. VTT is not applied directly to the device. VTT is a system supply for signal termination
resistors. MIN and MAX values are system-dependent.
Table 25: Input Switching Conditions
Parameter/Condition
Symbol
DDR3-800
DDR3-1066
DDR3-1333
DDR3-1600
DDR3-1866
Units
Command and Address
Input high AC voltage: Logic 1 @ 175mV
VIH(AC175)min
+175
–
mV
Input high AC voltage: Logic 1 @ 150mV
VIH(AC150)min
+150
–
mV
Input high AC voltage: Logic 1 @ 135 mV
VIH(AC135)min
–
+135
mV
Input high AC voltage: Logic 1 @ 125 mV
VIH(AC125)min
–
+125
mV
Input high DC voltage: Logic 1 @ 100 mV
VIH(DC100)min
+100
mV
Input low DC voltage: Logic 0 @ –100mV
VIL(DC100)max
–100
mV
Input low AC voltage: Logic 0 @ –125mV
VIL(AC125)max
–
–125
mV
Input low AC voltage: Logic 0 @ –135mV
VIL(AC130)max
–
–135
mV
Input low AC voltage: Logic 0 @ –150mV
VIL(AC150)max
–150
–
mV
Input low AC voltage: Logic 0 @ –175mV
VIL(AC175)max
–175
–
mV
DQ and DM
Input high AC voltage: Logic 1
VIH(AC175)min
+175
–
mV
Input high AC voltage: Logic 1
VIH(AC150)min
+150
–
mV
Input high AC voltage: Logic 1
VIH(AC135)min
–
+135
mV
Input high DC voltage: Logic 1
VIH(DC100)min
+100
mV
Input low DC voltage: Logic 0
VIL(DC100)max
–100
mV
Input low AC voltage: Logic 0
VIL(AC135)max
–
–135
mV
Input low AC voltage: Logic 0
VIL(AC150)max
–150
–
mV
Input low AC voltage: Logic 0
VIL(AC175)max
–175
–
mV
Notes: 1. All voltages are referenced to VREF. VREF is VREFCA for control, command, and address. All
slew rates and setup/hold times are specified at the DRAM ball. VREF is VREFDQ for DQ
and DM inputs.
2. Input setup timing parameters (tIS and tDS) are referenced at VIL(AC)/VIH(AC), not VREF(DC).
3. Input hold timing parameters (tIH and tDH) are referenced at VIL(DC)/VIH(DC), not VREF(DC).
4. Single-ended input slew rate = 1 V/ns; maximum input voltage swing under test is
900mV (peak-to-peak).
2Gb: x4, x8, x16 DDR3 SDRAM
Electrical Specifications – DC and AC
PDF: 09005aef826aaadc
2Gb_DDR3_SDRAM.pdf – Rev. K 04/10 EN
49
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2006 Micron Technology, Inc. All rights reserved.