Table 56: Electrical Characteristics and AC Operating Conditions (Continued)
Notes 1–8 apply to the entire table
Parameter
Symbol
DDR3-800
DDR3-1066
DDR3-1333
DDR3-1600
Units Notes
Min
Max
Min
Max
Min
Max
Min
Max
MULTIPURPOSE REGISTER READ burst end to
mode register set for multipurpose register
exit
tMPRR
MIN = 1CK; MAX = n/a
CK
Calibration Timing
ZQCL command: Long
calibration time
POWER-UP and RE-
SET operation
tZQinit
512
–
512
–
512
–
512
–
CK
Normal operation
tZQoper
256
–
256
–
256
–
256
–
CK
ZQCS command: Short calibration time
tZQcs
64
–
64
–
64
–
64
–
CK
Initialization and Reset Timing
Exit reset from CKE HIGH to a valid command
tXPR
MIN = greater of 5CK or tRFC + 10ns; MAX = n/a
CK
Begin power supply ramp to power supplies
stable
tVddpr
MIN = n/a; MAX = 200
ms
RESET# LOW to power supplies stable
tRPS
MIN = 0; MAX = 200
ms
RESET# LOW to I/O and RTT High-Z
tIOz
MIN = n/a; MAX = 20
ns
Refresh Timing
REFRESH-to-ACTIVATE or REFRESH
command period
tRFC – 1Gb
MIN = 110; MAX = 70,200
ns
tRFC – 2Gb
MIN = 160; MAX = 70,200
ns
tRFC – 4Gb
MIN = 300; MAX = 70,200
ns
Maximum refresh
period
TC ≤ +85°C
–
64 (1X)
ms
TC > +85°C
32 (2X)
ms
Maximum average
periodic refresh
TC ≤ +85°C
tREFI
7.8 (64ms/8192)
s
TC > +85°C
3.9 (32ms/8192)
s
Self Refresh Timing
Exit self refresh to commands not requiring a
locked DLL
tXS
MIN = greater of 5CK or tRFC + 10ns; MAX = n/a
CK
Exit self refresh to commands requiring a
locked DLL
tXSDLL
MIN = tDLLK (MIN); MAX = n/a
CK
Minimum CKE low pulse width for self re-
fresh entry to self refresh exit timing
tCKESR
MIN = tCKE (MIN) + CK; MAX = n/a
CK
Valid clocks after self refresh entry or power-
down entry
tCKSRE
MIN = greater of 5CK or 10ns; MAX = n/a
CK
2Gb:
x4,
x8,
x16
DDR3
SDRAM
Electrical
Characteristics
and
AC
Operating
Conditions
PDF:
09005aef826aaadc
2Gb_DDR3_SDRAM.pdf
–
Rev.
K
04/10
EN
81
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Technology,
Inc.
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2006
Micron
Technology,
Inc.
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