Table 65: Derating Values for tDS/tDH – AC175/DC100-Based
Shaded cells indicate slew rate combinations not supported
ΔtDS, ΔtDH Derating (ps) – AC/DC-Based
DQ Slew
Rate V/ns
DQS, DQS# Differential Slew Rate
4.0 V/ns
3.0 V/ns
2.0 V/ns
1.8 V/ns
1.6 V/ns
1.4 V/ns
1.2 V/ns
1.0 V/ns
ΔtDS ΔtDH ΔtDS ΔtDH ΔtDS ΔtDH ΔtDS ΔtDH ΔtDS ΔtDH ΔtDS ΔtDH ΔtDS ΔtDH ΔtDS ΔtDH
2.0
88
50
88
50
88
50
1.5
59
34
59
34
59
34
67
42
1.0
0
8
16
0.9
–2
–4
–2
–4
6
4
14
12
22
20
0.8
–6
–10
2
–2
10
6
18
14
26
24
0.7
–3
–8
5
0
13
8
21
18
29
34
0.6
–1
–10
7
–2
15
8
23
24
0.5
–11
–16
–2
–6
5
10
0.4
–30
–26
–22
–10
Table 66: Derating Values for tDS/tDH – AC150/DC100-Based
Shaded cells indicate slew rate combinations not supported
ΔtDS, ΔtDH Derating (ps) – AC/DC-Based
DQ Slew
Rate V/ns
DQS, DQS# Differential Slew Rate
4.0 V/ns
3.0 V/ns
2.0 V/ns
1.8 V/ns
1.6 V/ns
1.4 V/ns
1.2 V/ns
1.0 V/ns
ΔtDS ΔtDH ΔtDS ΔtDH ΔtDS ΔtDH ΔtDS ΔtDH ΔtDS ΔtDH ΔtDS ΔtDH ΔtDS ΔtDH ΔtDS ΔtDH
2.0
75
50
75
50
75
50
1.5
50
34
50
34
50
34
58
42
1.0
0
8
16
0.9
0
–4
0
–4
8
4
16
12
24
20
0.8
0
–10
8
–2
16
6
24
14
32
24
0.7
8
–8
16
0
24
8
32
18
40
34
0.6
15
–10
23
–2
31
8
39
24
0.5
14
–16
22
–6
30
10
0.4
7
–26
15
–10
2Gb: x4, x8, x16 DDR3 SDRAM
Data Setup, Hold, and Derating
PDF: 09005aef826aaadc
2Gb_DDR3_SDRAM.pdf – Rev. K 04/10 EN
106
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