Figure 29: Differential Output Signal
VOH
MIN output
MAX output
VOL
VOX(AC)max
VOX(AC)min
X
Reference Output Load
Figure 30 represents the effective reference load of
25Ω used in defining the relevant
device AC timing parameters (except ODT reference timing) as well as the output slew
rate measurements. It is not intended to be a precise representation of a particular sys-
tem environment or a depiction of the actual load presented by a production tester.
System designers should use IBIS or other simulation tools to correlate the timing refer-
ence load to a system environment.
Figure 30: Reference Output Load for AC Timing and Output Slew Rate
Timing reference point
DQ
DQS
DQS#
DUT
VREF
VTT = VDDQ/2
VDDQ/2
ZQ
RZQ = 240Ω
VSS
RTT = 25Ω
2Gb: x4, x8, x16 DDR3 SDRAM
Output Characteristics and Operating Conditions
PDF: 09005aef826aaadc
2Gb_DDR3_SDRAM.pdf – Rev. K 04/10 EN
71
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2006 Micron Technology, Inc. All rights reserved.